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<ul>
<li><a href="#about" style=" font-size: 16px;">Synthesis Messages</a></li>
<li><a href="#summary" style=" font-size: 16px;">Synthesis Details</a></li>
<li><a href="#resource" style=" font-size: 16px;">Resource</a>
<ul>
<li><a href="#usage" style=" font-size: 14px;">Resource Usage Summary</a></li>
<li><a href="#utilization" style=" font-size: 14px;">Resource Utilization Summary</a></li>
</ul>
</li>
<li><a href="#timing" style=" font-size: 16px;">Timing</a>
<ul>
<li><a href="#clock" style=" font-size: 14px;">Clock Summary</a></li>
<li><a href="#performance" style=" font-size: 14px;">Max Frequency Summary</a></li>
<li><a href="#detail timing" style=" font-size: 14px;">Detail Timing Paths Informations</a></li>
</ul>
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<h1><a name="about">Synthesis Messages</a></h1>
<table class="summary_table">
<tr>
<td class="label">Report Title</td>
<td>GowinSynthesis Report</td>
</tr>
<tr>
<td class="label">Design File</td>
<td>E:\HL\hl_laser\src\alarm_ctrl.v<br>
E:\HL\hl_laser\src\divider.v<br>
E:\HL\hl_laser\src\gowin_pllo\gowin_pllo.v<br>
E:\HL\hl_laser\src\hl_laser_top.v<br>
E:\HL\hl_laser\src\laser_ctrl.v<br>
E:\HL\hl_laser\src\led_ctrl.v<br>
E:\HL\hl_laser\src\pulse_width_detect.v<br>
E:\HL\hl_laser\src\pwm_detect.v<br>
E:\HL\hl_laser\src\sync_cycle_detect.v<br>
C:\Gowin\Gowin_V1.9.8.06-1\IDE\data\ipcores\GAO\GW_AO_0\gw_ao_crc32.v<br>
C:\Gowin\Gowin_V1.9.8.06-1\IDE\data\ipcores\GAO\GW_AO_0\gw_ao_match.v<br>
C:\Gowin\Gowin_V1.9.8.06-1\IDE\data\ipcores\GAO\GW_AO_0\gw_ao_mem_ctrl.v<br>
C:\Gowin\Gowin_V1.9.8.06-1\IDE\data\ipcores\GAO\GW_AO_0\gw_ao_top.v<br>
C:\Gowin\Gowin_V1.9.8.06-1\IDE\data\ipcores\GAO\GW_CON\gw_con_top.v<br>
C:\Gowin\Gowin_V1.9.8.06-1\IDE\data\ipcores\gw_jtag.v<br>
E:\HL\hl_laser\impl\gwsynthesis\RTL_GAO\gw_gao_top.v<br>
</td>
</tr>
<tr>
<td class="label">GowinSynthesis Constraints File</td>
<td>---</td>
</tr>
<tr>
<td class="label">Version</td>
<td>GowinSynthesis V1.9.8.06-1</td>
</tr>
<tr>
<td class="label">Part Number</td>
<td>GW1N-UV2MG132C7/I6</td>
</tr>
<tr>
<td class="label">Device</td>
<td>GW1N-2B</td>
</tr>
<tr>
<td class="label">Created Time</td>
<td>Thu Apr 24 13:48:22 2025
</td>
</tr>
<tr>
<td class="label">Legal Announcement</td>
<td>Copyright (C)2014-2022 Gowin Semiconductor Corporation. ALL rights reserved.</td>
</tr>
</table>
<h1><a name="summary">Synthesis Details</a></h1>
<table class="summary_table">
<tr>
<td class="label">Top Level Module</td>
<td>hl_laser_top</td>
</tr>
<tr>
<td class="label">Synthesis Process</td>
<td>Running parser:<br/>&nbsp;&nbsp;&nbsp;&nbsp;CPU time = 0h 0m 0.359s, Elapsed time = 0h 0m 0.357s, Peak memory usage = 158.113MB<br/>Running netlist conversion:<br/>&nbsp;&nbsp;&nbsp;&nbsp;CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 0MB<br/>Running device independent optimization:<br/>&nbsp;&nbsp;&nbsp;&nbsp;Optimizing Phase 0: CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.075s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Optimizing Phase 1: CPU time = 0h 0m 0.046s, Elapsed time = 0h 0m 0.045s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Optimizing Phase 2: CPU time = 0h 0m 0.109s, Elapsed time = 0h 0m 0.109s, Peak memory usage = 158.113MB<br/>Running inference:<br/>&nbsp;&nbsp;&nbsp;&nbsp;Inferring Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.014s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Inferring Phase 1: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Inferring Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.008s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Inferring Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.005s, Peak memory usage = 158.113MB<br/>Running technical mapping:<br/>&nbsp;&nbsp;&nbsp;&nbsp;Tech-Mapping Phase 0: CPU time = 0h 0m 0.125s, Elapsed time = 0h 0m 0.108s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Tech-Mapping Phase 1: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.025s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Tech-Mapping Phase 2: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.03s, Peak memory usage = 158.113MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Tech-Mapping Phase 3: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 168.805MB<br/>&nbsp;&nbsp;&nbsp;&nbsp;Tech-Mapping Phase 4: CPU time = 0h 0m 0.109s, Elapsed time = 0h 0m 0.133s, Peak memory usage = 168.805MB<br/>Generate output files:<br/>&nbsp;&nbsp;&nbsp;&nbsp;CPU time = 0h 0m 0.046s, Elapsed time = 0h 0m 0.054s, Peak memory usage = 168.805MB<br/></td>
</tr>
<tr>
<td class="label">Total Time and Memory Usage</td>
<td>CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 168.805MB</td>
</tr>
</table>
<h1><a name="resource">Resource</a></h1>
<h2><a name="usage">Resource Usage Summary</a></h2>
<table class="summary_table">
<tr>
<td class="label"><b>Resource</b></td>
<td><b>Usage</b></td>
</tr>
<tr>
<td class="label"><b>I/O Port </b></td>
<td>86</td>
</tr>
<tr>
<td class="label"><b>I/O Buf </b></td>
<td>84</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspIBUF</td>
<td>23</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspOBUF</td>
<td>61</td>
</tr>
<tr>
<td class="label"><b>Register </b></td>
<td>1252</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFF</td>
<td>220</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFS</td>
<td>1</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFR</td>
<td>34</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFRE</td>
<td>43</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFP</td>
<td>6</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFPE</td>
<td>36</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFC</td>
<td>157</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFCE</td>
<td>749</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFNP</td>
<td>2</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspDFFNC</td>
<td>4</td>
</tr>
<tr>
<td class="label"><b>LUT </b></td>
<td>1108</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspLUT2</td>
<td>213</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspLUT3</td>
<td>247</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspLUT4</td>
<td>648</td>
</tr>
<tr>
<td class="label"><b>MUX </b></td>
<td>1</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspMUX16</td>
<td>1</td>
</tr>
<tr>
<td class="label"><b>ALU </b></td>
<td>184</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspALU</td>
<td>184</td>
</tr>
<tr>
<td class="label"><b>SSRAM </b></td>
<td>6</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspRAM16S4</td>
<td>6</td>
</tr>
<tr>
<td class="label"><b>INV </b></td>
<td>20</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspINV</td>
<td>20</td>
</tr>
<tr>
<td class="label"><b>BSRAM </b></td>
<td>4</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspSDPX9B</td>
<td>4</td>
</tr>
<tr>
<td class="label"><b>CLOCK </b></td>
<td>1</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspPLLO</td>
<td>1</td>
</tr>
<tr>
<td class="label"><b>Black Box </b></td>
<td>1</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp&nbsp&nbspGW_JTAG</td>
<td>1</td>
</tr>
</table>
<h2><a name="utilization">Resource Utilization Summary</a></h2>
<table class="summary_table">
<tr>
<td class="label"><b>Resource</b></td>
<td><b>Usage</b></td>
<td><b>Utilization</b></td>
</tr>
<tr>
<td class="label">Logic</td>
<td>1356(1136 LUTs, 184 ALUs, 6 SSRAMs) / 2304</td>
<td>59%</td>
</tr>
<tr>
<td class="label">Register</td>
<td>1252 / 2616</td>
<td>48%</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp--Register as Latch</td>
<td>0 / 2616</td>
<td>0%</td>
</tr>
<tr>
<td class="label">&nbsp&nbsp--Register as FF</td>
<td>1252 / 2328</td>
<td>54%</td>
</tr>
<tr>
<td class="label">BSRAM</td>
<td>4 / 4</td>
<td>100%</td>
</tr>
</table>
<h1><a name="timing">Timing</a></h1>
<h2><a name="clock">Clock Summary:</a></h2>
<table class="summary_table">
<tr>
<th>Clock Name</th>
<th>Type</th>
<th>Period</th>
<th>Frequency(MHz)</th>
<th>Rise</th>
<th>Fall</th>
<th>Source</th>
<th>Master</th>
<th>Object</th>
</tr>
<tr>
<td>clk_in</td>
<td>Base</td>
<td>20.000</td>
<td>50.0</td>
<td>0.000</td>
<td>10.000</td>
<td> </td>
<td> </td>
<td>clk_in_ibuf/I </td>
</tr>
</table>
<h2><a name="performance">Max Frequency Summary:</a></h2>
<table class="summary_table">
<tr>
<th>No.</th>
<th>Clock Name</th>
<th>Constraint</th>
<th>Actual Fmax</th>
<th>Logic Level</th>
<th>Entity</th>
</tr>
</table>
<h2><a name="performance">No timing path found in the </a><a name="detail timing">netlist</a>.</h2><br/>
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